// Copyright (c) 2009-2011, Tor M. Aamodt, Ali Bakhoda, George L. Yuan
// The University of British Columbia
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
// Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution. Neither the name of
// The University of British Columbia nor the names of its contributors may be
// used to endorse or promote products derived from this software without
// specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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#ifndef dram_sched_h_INCLUDED
#define dram_sched_h_INCLUDED

#include <list>
#include <map>
#include "dram.h"
#include "gpu-misc.h"
#include "gpu-sim.h"
#include "shader.h"

enum memory_mode { READ_MODE = 0, WRITE_MODE };

class frfcfs_scheduler {
 public:
  frfcfs_scheduler(const memory_config *config, dram_t *dm,
                   memory_stats_t *stats);
  void add_req(dram_req_t *req);
  void data_collection(unsigned bank);
  dram_req_t *schedule(unsigned bank, unsigned curr_row);
  void print(FILE *fp);
  unsigned num_pending() const { return m_num_pending; }
  unsigned num_write_pending() const { return m_num_write_pending; }

 private:
  const memory_config *m_config;
  dram_t *m_dram;
  unsigned m_num_pending;
  unsigned m_num_write_pending;
  std::list<dram_req_t *> *m_queue;
  std::map<unsigned, std::list<std::list<dram_req_t *>::iterator> > *m_bins;
  std::list<std::list<dram_req_t *>::iterator> **m_last_row;
  unsigned *curr_row_service_time;  // one set of variables for each bank.
  unsigned *row_service_timestamp;  // tracks when scheduler began servicing
                                    // current row

  std::list<dram_req_t *> *m_write_queue;
  std::map<unsigned, std::list<std::list<dram_req_t *>::iterator> >
      *m_write_bins;
  std::list<std::list<dram_req_t *>::iterator> **m_last_write_row;

  enum memory_mode m_mode;
  memory_stats_t *m_stats;
};

#endif
